The trend in the semiconductor industry is towards reducing device dimensions. For example, in the manufacturing of highly dense integrated circuits that use metal oxide semiconductor field effect transistors (MOSFETs), as device dimensions are decreased, there is a need to create shallower source and drain regions. However, the high doping concentrations of shallow source and drain regions lead to an increase in the electric field in the channel close to the drain. The high electric field causes electrons in the device channel to gain energy and be injected into the gate oxide, which is a phenomenon that is referred to as a “hot electron” problem. The hot electron phenomenon leads to long term device degradation and reduced reliability.
One approach to minimize the hot electron problem is by using a double diffused drain method, in which two implants are performed to form a drain. For example, a double diffused drain (DDD) is often used as a source or drain in a high voltage metal oxide semiconductor (HVMOS) transistor. The term “high voltage transistor” used herein generally refers to a transistor device having a high breakdown voltage.
A double diffused drain provides a high breakdown voltage for a HVMOS transistor and prevents electrostatic discharge that may result in the destruction of a semiconductor device. A double diffused drain also provides a solution to hot electron effects which result from shortened channeling in the MOS transistor.
High voltage devices are sometimes manufactured on the same chip as low voltage devices (e.g., having a low breakdown voltage relative to the higher breakdown voltage of the high voltage devices). It is important that the high voltage transistors do not deleteriously affect the performance of the low voltage transistors in such a structure.
What is needed in the art are improved methods of forming double diffused drain structures and improved double diffused drain structures.